Visual register-transfer description of VLSI microarchitectures

This paper describes a new visual approach to creating and manipulating symbolic descriptions of VLSI microarchitectures at the register-transfer (RT) level. The MIES visual RT description provides a number of views of a microarchitecture's datapath and controller that visually emphasize different aspects of a design. The key view ties together a symbolic description of the RT operations invoked by a controller with the flow and manipulation of data in the datapath. A prototype implementation demonstrates a number of interesting capabilities, which are illustrated using several examples.